Microprocessor Forum Japan 2008
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codeplay

codeplay
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ARM

CoWare
FUJITSU

IBM

tensilica

tensilica


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TOSHIBA Corporation Semiconductor Company
SpursEngine™, Media Streaming Processor
Various functions of PC where SpursEngine™ is applied will be introduced such as a hardware codec of Full HD, high-speed up-convert, video indexing, and hand-gesture remote control.
The processor equipped with four SPEs derived from Cell/B.E.™ has flexible arithmetic processing and achieves high performance. In addition, it has a PCI Express connector, so customers can connect the processor to a host system and utilize their software asset more effectively.
Codeplay Software Limited
Codeplay Sieve C++ Multi-core Programming Platform
The Sieve C++ Multi-core Programming Platform harnesses the power of multi-core processors being developed by many chip manufacturers. For the end user this means that software developed using Sieve will use all the cores on target platforms.
The Sieve system supports:-
* Multiple types of parallelism, including task parallelism, data parallelism and pipelining
* Non-uniform memory architectures
* Coding and debugging advice for software developers
* High-level abstraction of parallelism, giving scalable, portable software with retargetability for future architectures
Target Compiler Technologies N.V. iPartner: Innotech Corporation j
Target IP Designer
IP Designer is a retargetable tool-suite for ASIP design. The designer can easily describe each ASIP in nML language. From nML, an effecient SDK is generated instaneously, containing:
* An optimising C compiler, assembler, disassembler and linker.
* An instruction-set simulator.
* A hardware generator.
* A test program generator.
ARM K.K.
A Cortex-A9 Evaluation Platform Using Soft Macrocell Model
The ARM Cortex-A9 processors are the latest and highest performance ARM processors implementing the full richness of the widely supported ARMv7 architecture. Designed around the most advanced, high efficiency, dynamic length, multi-issue superscalar, out-of-order, speculating 8-stage pipeline, the Cortex- A9 processors deliver unprecedented levels of performance and power efficiency with the functionality required for leading edge products across the broad range of consumer, networking, enterprise and mobile applications.
CoWare K.K.
CoWare Processor Designer
Processor Designer dramatically accelerates the design of both custom processors and programmable accelerators, including the application-specific instruction set processors (ASIPs) that are increasingly essential to convergent system-on-chip (SoC) functionality. We are going to exhibit and explain about development a wide range of processor architectures, including architectures with DSP-specific and RISC-specific features as well as SIMD and VLIW architectures.
Fujitsu Microelectronics Limited
Fujitsu Embedded Processor Platform
Fujitsu Microelectronics Ltd. will introduce our ARPC based embedded system solutions which integrated multicore systems. We developed an embedded multicore system which integrated a improvement of processing activating ratio, decrease of redundant power consumption and new programming model scalable for number of processor cores. We can see our demonstration using Fujitsu FR-V processor.
Tensilica Inc.
Diamond Standard 330 HiFi
Tensilica's Diamond Standard 330HiFi is an optimized, drop-in solution for portable music applications, with a complete set of software codecs for multiple popular audio standards. Attendees can see this demonstration and receive more information.
TRANGO Virtual Processors
TRANGO Hypervisor for Mobile Phones
Designed for security and real-time performance,the TRANGO Hypervisor enables silicon vendors, OEMs and operators to securely and simultaneously run multiple operating systems and applications on both single and multi core platforms. This allows them to:
* Integrate a rich OS like Linux, Symbian or Windows CE into existing products
* Isolate proprietary code and drivers from GPL licensed code
* Secure and certify critical components independently from OS and applications
* Improve overall performance, security and power efficiency
* Build scalable designs from single core to multi-core or multi-thread platforms

<Benefits>
* Bill of materials reduction
* Streamlined system integration and optimization
* Compliance with high security and high reliability
requirements
* Reduced time-to-market



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